- Zig-zag run where we vary from 0.4 to 0.6 so that we can get more sampling of the selective pressure.
- Maintenance of a slower growing variant vs. a faster growing "mutant".
- Could demonstrate this with a slower growing CFP vs YFP or via something like F2620.
- Zig-zag experiment with different dilution rate (e.g. different total number of cells).
- How much faster can we drive it given the timing?
- Are there more or less cells in a sort vs a screen?
- No, looked at this before last lab meeting, but should write it up.
- Do fluctuations in the total cell count correlate with anything?
- Sortostat mFiles doc - list of all the mfiles that matter (except the image processing). These are all commented and cleaned up at this point.
- Sortostat Modeling Probability Distributions doc - description of the modeling of the probability distributions for the number of cells in the sorting chamber and how many are CFP or YFP.
- Sortostat Modeling Stochastic Sim doc - description of the stochastic simulation of Sortostat performance.
To Do List
- Figure out the MATLAB memory leak
- I suspect this is because I'm not closing the image files properly in the MATLAB script that runs, or it could be something more annoying.
- Does the leak influence the timing of the events, by making the image processing take too long? (e.g. why does the timing graph get noisy after awhile?)
- Is it the MATLAB thread that blows up or the LabView? it's MATLAB.
- output the direction of sorting to the output file
- Clean up the Image Processing MATLAB scripts
- Why do I see any variability in the timing? Timing between cleaning events is rock solid, the timing between sorts is influenced by the time it takes to process the image.
- Change the code so that when flipping based on the CFP it is the moving average that is used, rather than a single image.
- Make the list of experiments to evaluate the device performance limits.
- Sorting at various dilution rates, followed by a sort to extinction.
- Sortostat/Foundry report card - post notes on each chip fabricated so can document common failure points in fabrication to better avoid them.